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Searched refs:EPCTR (Results 1 – 2 of 2) sorted by relevance

/drivers/staging/emxx_udc/
Demxx_udc.c2156 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST)); in _nbu2ss_enable_controller()
2159 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD); in _nbu2ss_enable_controller()
2162 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST); in _nbu2ss_enable_controller()
2169 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) { in _nbu2ss_enable_controller()
2196 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST); in _nbu2ss_reset_controller()
2197 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST); in _nbu2ss_reset_controller()
2206 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST)); in _nbu2ss_disable_controller()
2863 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME); in nbu2ss_gad_wakeup()
2866 data = _nbu2ss_readl(&udc->p_regs->EPCTR); in nbu2ss_gad_wakeup()
2872 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME); in nbu2ss_gad_wakeup()
Demxx_udc.h444 u32 EPCTR; /* (0x1010) EPCTR */ member