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Searched refs:ETH_PLL_CTL2 (Results 1 – 1 of 1) sorted by relevance

/drivers/net/mdio/
Dmdio-mux-meson-g12a.c29 #define ETH_PLL_CTL2 0x4c macro
134 writel(0xac5f49e5, pll->base + ETH_PLL_CTL2); in g12a_ephy_pll_init()