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Searched refs:ETH_PLL_CTL3 (Results 1 – 1 of 1) sorted by relevance

/drivers/net/mdio/
Dmdio-mux-meson-g12a.c30 #define ETH_PLL_CTL3 0x50 macro
135 writel(0x00000000, pll->base + ETH_PLL_CTL3); in g12a_ephy_pll_init()