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Searched refs:GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h4314 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK 0x00000060L macro
Dgfx_7_2_sh_mask.h14617 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK 0x60 macro
Dgfx_8_0_sh_mask.h16545 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK 0x60 macro
Dgfx_8_1_sh_mask.h17133 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK 0x60 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h4728 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK … macro
Dgc_9_1_sh_mask.h4200 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK … macro
Dgc_9_2_1_sh_mask.h4106 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK … macro
Dgc_10_3_0_sh_mask.h9168 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK … macro
Dgc_10_1_0_sh_mask.h8999 #define GDS_CONFIG__SH2_GPR_PHASE_SEL_MASK … macro