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Searched refs:GDS_GWS_VMID5__BASE_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h15105 #define GDS_GWS_VMID5__BASE_MASK 0x3f macro
Dgfx_8_0_sh_mask.h17065 #define GDS_GWS_VMID5__BASE_MASK 0x3f macro
Dgfx_8_1_sh_mask.h17653 #define GDS_GWS_VMID5__BASE_MASK 0x3f macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13685 #define GDS_GWS_VMID5__BASE_MASK macro
Dgc_9_1_sh_mask.h14992 #define GDS_GWS_VMID5__BASE_MASK macro
Dgc_9_2_1_sh_mask.h14850 #define GDS_GWS_VMID5__BASE_MASK macro
Dgc_10_3_0_sh_mask.h19278 #define GDS_GWS_VMID5__BASE_MASK macro
Dgc_10_1_0_sh_mask.h21131 #define GDS_GWS_VMID5__BASE_MASK macro