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Searched refs:GEN7_L3SQCREG1 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
Di915_cmd_parser.c631 REG32(GEN7_L3SQCREG1),
Di915_reg.h8049 #define GEN7_L3SQCREG1 _MMIO(0xB010) macro
/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c941 wa_write(wal, GEN7_L3SQCREG1, VLV_B0_WA_L3SQCREG1_VALUE); in vlv_gt_workarounds_init()