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Searched refs:HDA_BASE__INST2_SEG0 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h543 #define HDA_BASE__INST2_SEG0 0 macro
Dnavi14_ip_offset.h543 #define HDA_BASE__INST2_SEG0 0 macro
Dsienna_cichlid_ip_offset.h550 #define HDA_BASE__INST2_SEG0 0 macro
Drenoir_ip_offset.h667 #define HDA_BASE__INST2_SEG0 0 macro