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Searched refs:HIVE_ISP_DDR_WORD_BYTES (Results 1 – 14 of 14) sorted by relevance

/drivers/staging/media/atomisp/pci/hive_isp_css_common/
Ddebug_global.h31 #define DEBUG_DATA_BUF_MODE_DDR_ADDR HIVE_ISP_DDR_WORD_BYTES
32 #define DEBUG_DATA_HEAD_DDR_ADDR (2 * HIVE_ISP_DDR_WORD_BYTES)
33 #define DEBUG_DATA_TAIL_DDR_ADDR (3 * HIVE_ISP_DDR_WORD_BYTES)
34 #define DEBUG_DATA_BUF_DDR_ADDR (4 * HIVE_ISP_DDR_WORD_BYTES)
68 #ifdef HIVE_ISP_DDR_WORD_BYTES
71 s8 padding1[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)];
73 s8 padding2[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)];
75 s8 padding3[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)];
77 s8 padding4[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)];
/drivers/staging/media/atomisp/pci/runtime/isys/src/
Drx.c442 unsigned int memory_alignment_in_bytes = HIVE_ISP_DDR_WORD_BYTES; in ia_css_csi2_calculate_input_system_alignment()
465 memory_alignment_in_bytes = 2 * HIVE_ISP_DDR_WORD_BYTES; in ia_css_csi2_calculate_input_system_alignment()
469 memory_alignment_in_bytes = HIVE_ISP_DDR_WORD_BYTES; in ia_css_csi2_calculate_input_system_alignment()
Dvirtual_isys.c587 bytes_per_line = HIVE_ISP_DDR_WORD_BYTES * words_per_line; in calculate_stride()
858 cfg->width = CEIL_DIV(cfg->stride, HIVE_ISP_DDR_WORD_BYTES); in calculate_isys2401_dma_port_cfg()
/drivers/staging/media/atomisp/pci/
Dhive_isp_css_defs.h31 #define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS / 8) macro
39 #define CSS_DDR_WORD_BYTES HIVE_ISP_DDR_WORD_BYTES
Dsh_css_defs.h179 (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES)
342 ((c_subsampling) * (num_chunks) * HIVE_ISP_DDR_WORD_BYTES)
Dsh_css_param_dvs.h57 , HIVE_ISP_DDR_WORD_BYTES)
Dsh_css_mipi.c510 my_css.mipi_frame_size[port] * HIVE_ISP_DDR_WORD_BYTES, in allocate_mipi_frames()
Dsh_css_params.c2263 me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); in ia_css_isp_3a_statistics_allocate()
2264 me->vmem_size = CEIL_MUL(me->vmem_size, HIVE_ISP_DDR_WORD_BYTES); in ia_css_isp_3a_statistics_allocate()
2265 me->hmem_size = CEIL_MUL(me->hmem_size, HIVE_ISP_DDR_WORD_BYTES); in ia_css_isp_3a_statistics_allocate()
2761 HIVE_ISP_DDR_WORD_BYTES), in sh_css_params_init()
Dsh_css.c9143 md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES);
/drivers/staging/media/atomisp/pci/runtime/frame/src/
Dframe.c481 CEIL_MUL(align, 2 * HIVE_ISP_DDR_WORD_BYTES); in ia_css_frame_info_set_width()
488 info->padded_width = CEIL_MUL(align, HIVE_ISP_DDR_WORD_BYTES); in ia_css_frame_info_set_width()
609 config->stride = HIVE_ISP_DDR_WORD_BYTES * words_per_line; in ia_css_dma_configure_from_info()
663 stride = HIVE_ISP_DDR_WORD_BYTES * in frame_init_raw_single_plane()
/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/
Dia_css_sdis2.host.c239 HIVE_ISP_DDR_WORD_BYTES) / sizeof(*htemp_ptr); in ia_css_translate_dvs2_statistics()
293 size = CEIL_MUL(sizeof(int) * grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES) in ia_css_isp_dvs2_statistics_allocate()
/drivers/staging/media/atomisp/pci/isp/modes/interface/
Disp_const.h34 #define XMEM_POW2_BYTES_PER_WORD HIVE_ISP_DDR_WORD_BYTES
/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/
Dia_css_sdis.host.c328 HIVE_ISP_DDR_WORD_BYTES); in ia_css_isp_dvs_statistics_allocate()
331 HIVE_ISP_DDR_WORD_BYTES); in ia_css_isp_dvs_statistics_allocate()
/drivers/staging/media/atomisp/pci/runtime/spctrl/src/
Dspctrl.c82 if ((init_dmem_cfg->ddr_data_addr % HIVE_ISP_DDR_WORD_BYTES) != 0) { in ia_css_spctrl_load_fw()