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Searched refs:IH_RB_WPTR (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dcz_ih.c196 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
202 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
205 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
Diceland_ih.c196 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
202 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
205 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
Dtonga_ih.c198 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
204 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
207 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
Dsi_ih.c57 WREG32(IH_RB_WPTR, 0); in si_ih_disable_interrupts()
88 WREG32(IH_RB_WPTR, 0); in si_ih_irq_init()
Dvega10_ih.c382 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
397 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
400 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
Dnavi10_ih.c456 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
469 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
471 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
Dsid.h664 #define IH_RB_WPTR 0xF83 macro
/drivers/gpu/drm/radeon/
Dr600.c3616 WREG32(IH_RB_WPTR, 0); in r600_disable_interrupts()
3728 WREG32(IH_RB_WPTR, 0); in r600_irq_init()
4047 wptr = RREG32(IH_RB_WPTR); in r600_get_ih_wptr()
4110 RREG32(IH_RB_WPTR); in r600_irq_process()
Dsid.h661 #define IH_RB_WPTR 0x3e0c macro
Dcikd.h811 #define IH_RB_WPTR 0x3e0c macro
Devergreend.h1230 #define IH_RB_WPTR 0x3e0c macro
Dsi.c5947 WREG32(IH_RB_WPTR, 0); in si_disable_interrupts()
6033 WREG32(IH_RB_WPTR, 0); in si_irq_init()
6221 wptr = RREG32(IH_RB_WPTR); in si_get_ih_wptr()
Dr600d.h669 #define IH_RB_WPTR 0x3e0c macro
Dcik.c6853 WREG32(IH_RB_WPTR, 0); in cik_disable_interrupts()
6997 WREG32(IH_RB_WPTR, 0); in cik_irq_init()
7499 wptr = RREG32(IH_RB_WPTR); in cik_get_ih_wptr()
Devergreen.c4683 wptr = RREG32(IH_RB_WPTR); in evergreen_get_ih_wptr()