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Searched refs:IO_IRQ_BASE (Results 1 – 1 of 1) sorted by relevance

/drivers/irqchip/
Dirq-zevio.c26 #define IO_IRQ_BASE 0x000 macro
92 zevio_init_irq_base(zevio_irq_io + IO_IRQ_BASE); in zevio_of_init()
109 gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
110 gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
111 gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; in zevio_of_init()
112 gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; in zevio_of_init()