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Searched refs:MC (Results 1 – 18 of 18) sorted by relevance

/drivers/staging/fsl-dpaa2/ethsw/
DREADME25 configured via the Management Complex (MC) portals. MC abstracts most of
49 | MC hardware portals |
86 A device is created for the switch objects probed on the MC bus. Each DPSW
91 be added to a container on the MC bus in one of two ways: statically,
92 through a Datapath Layout Binary file (DPL) that is parsed by MC at boot
DTODO5 * MC firmware uprev; the DPAA2 objects used by the Ethernet Switch driver
6 need to be kept in sync with binary interface changes in MC
/drivers/char/
Dhpet.c56 #define write_counter(V, MC) writeq(V, MC) argument
57 #define read_counter(MC) readq(MC) argument
59 #define write_counter(V, MC) writel(V, MC) argument
60 #define read_counter(MC) readl(MC) argument
/drivers/dma/fsl-dpaa2-qdma/
DKconfig9 using the NXP MC bus driver.
/drivers/net/ethernet/freescale/enetc/
Denetc_pf.h9 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE}; enumerator
Denetc_pf.c230 filter = &pf->mac_filter[MC]; in enetc_pf_set_rx_mode()
/drivers/net/ethernet/freescale/dpaa2/
DKconfig13 MC bus.
/drivers/iio/pressure/
Dbmp280-core.c39 enum { AC1, AC2, AC3, AC4, AC5, AC6, B1, B2, MB, MC, MD }; enumerator
51 s16 MC; member
782 calib->MC = be16_to_cpu(buf[MC]); in bmp180_read_calib()
800 x2 = (calib->MC << 11) / (x1 + calib->MD); in bmp180_compensate_temp()
/drivers/memory/samsung/
DKconfig5 Support for the Memory Controller (MC) devices found on
/drivers/memory/tegra/
DKconfig7 This driver supports the Memory Controller (MC) hardware found on
/drivers/edac/
DKconfig233 tristate "Intel Sandy-Bridge/Ivy-Bridge/Haswell Integrated MC"
240 tristate "Intel Skylake server Integrated MC"
252 tristate "Intel 10nm server Integrated MC"
/drivers/crypto/caam/
DKconfig174 (MC) fsl-mc bus.
/drivers/char/ipmi/
DKconfig142 Provides a driver for a device (Satellite MC) to
/drivers/gpu/drm/amd/pm/inc/
Dhwmgr.h728 uint32_t MC; member
/drivers/infiniband/ulp/rtrs/
DREADME49 discussed in LPC RDMA MC 2019. When always_invalidate=Y, on the server side we
/drivers/media/dvb-frontends/
DKconfig440 tristate "DiBcom 7000MA/MB/PA/PB/MC"
723 tristate "DiBcom 8000MB/MC"
/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dbase.c2699 _(MC , device->mc , &device->mc->subdev); in nvkm_device_subdev()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c146 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); in smu7_get_mc_microcode_version()