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Searched refs:MCLK (Results 1 – 13 of 13) sorted by relevance

/drivers/spi/
Dspi-mpc52xx-psc.c27 #define MCLK 20000000 /* PSC port MClk in hz */ macro
104 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
106 ccr |= (MCLK / 1000000 - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
315 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK; in mpc52xx_psc_spi_port_config()
/drivers/media/pci/ddbridge/
Dddbridge-sx8.c23 static const u32 MCLK = (1550000000 / 12); variable
196 if (p->symbol_rate >= (MCLK / 2)) in start()
218 if (p->symbol_rate >= MCLK / 2) { in start()
253 i = (p->symbol_rate > (MCLK / 2)) ? 3 : 7; in start()
/drivers/video/fbdev/sis/
Dinit.c2268 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK, in SiS_DoCalcDelay() argument
2281 idx1 = longtemp % (MCLK * 16); in SiS_DoCalcDelay()
2282 longtemp /= (MCLK * 16); in SiS_DoCalcDelay()
2289 unsigned short colordepth, unsigned short MCLK) in SiS_CalcDelay() argument
2293 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0); in SiS_CalcDelay()
2294 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1); in SiS_CalcDelay()
2306 unsigned short temp, index, VCLK, MCLK, colorth; in SiS_SetCRT1FIFO_300() local
2324 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; in SiS_SetCRT1FIFO_300()
2330 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1; in SiS_SetCRT1FIFO_300()
Dinit301.c5337 unsigned short VCLK = 0, MCLK, colorth = 0, data2 = 0; in SiS_SetCRT2FIFO_300() local
5384 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; in SiS_SetCRT2FIFO_300()
5390 data2 = temp - ((colorth * VCLK) / MCLK); in SiS_SetCRT2FIFO_300()
5470 temp = data % (MCLK << 4); in SiS_SetCRT2FIFO_300()
5471 data = data / (MCLK << 4); in SiS_SetCRT2FIFO_300()
/drivers/video/fbdev/matrox/
Dmatroxfb_Ti3026.c205 #define TVP3026_XPLLADDR_X(LOOP,MCLK,PIX) (((LOOP)<<4) | ((MCLK)<<2) | (PIX)) argument
/drivers/video/fbdev/savage/
Dsavagefb.h211 int MCLK, REFCLK, LCDclk; member
Dsavagefb_driver.c1086 if (par->MCLK <= 0) { in savagefb_decode_var()
1090 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, in savagefb_decode_var()
1936 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; in savage_init_hw()
1938 par->MCLK); in savage_init_hw()
/drivers/clk/
DKconfig201 codec (sometimes known as MCLK).
/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c113 CLK_MAP(MCLK, CLOCK_FCLK),
/drivers/video/fbdev/aty/
Daty128fb.c300 u16 MCLK; member
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dnavi10_ppt.c154 CLK_MAP(MCLK, PPCLK_UCLK),
Darcturus_ppt.c153 CLK_MAP(MCLK, PPCLK_UCLK),
Dsienna_cichlid_ppt.c138 CLK_MAP(MCLK, PPCLK_UCLK),