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Searched refs:MIPI_HSYNC_COUNT_REG (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/gma500/
Dmdfld_dsi_output.h99 #define MIPI_HSYNC_COUNT_REG(pipe) (0xb028 + REG_OFFSET(pipe)) macro
Dmdfld_dsi_dpi.c529 REG_WRITE(MIPI_HSYNC_COUNT_REG(pipe), in mdfld_dsi_dpi_controller_init()
758 REG_WRITE(MIPI_HSYNC_COUNT_REG(pipe), in mdfld_mipi_set_video_timing()