Searched refs:MPLL_CNTL_MODE (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| D | rv740d.h | 42 #define MPLL_CNTL_MODE 0x61c macro
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| D | rv740_dpm.c | 404 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); in rv740_enable_mclk_spread_spectrum()
406 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); in rv740_enable_mclk_spread_spectrum()
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| D | cypress_dpm.c | 231 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); in cypress_enable_spread_spectrum()
235 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); in cypress_enable_spread_spectrum()
236 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_DSMODE_EN); in cypress_enable_spread_spectrum()
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| D | rv770.c | 1159 tmp = RREG32(MPLL_CNTL_MODE); in rv770_set_clk_bypass_mode()
1164 WREG32(MPLL_CNTL_MODE, tmp); in rv770_set_clk_bypass_mode()
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| D | rv770d.h | 114 #define MPLL_CNTL_MODE 0x61c macro
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| D | nid.h | 556 #define MPLL_CNTL_MODE 0x61c macro
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| D | sid.h | 610 #define MPLL_CNTL_MODE 0x2bb0 macro
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| D | evergreend.h | 93 #define MPLL_CNTL_MODE 0x61c macro
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| D | si.c | 4013 tmp = RREG32(MPLL_CNTL_MODE); in si_set_clk_bypass_mode()
4015 WREG32(MPLL_CNTL_MODE, tmp); in si_set_clk_bypass_mode()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | si.c | 1242 tmp = RREG32(MPLL_CNTL_MODE); in si_set_clk_bypass_mode()
1244 WREG32(MPLL_CNTL_MODE, tmp); in si_set_clk_bypass_mode()
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| D | sid.h | 611 #define MPLL_CNTL_MODE 0xAEC macro
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