Home
last modified time | relevance | path

Searched refs:NIX_TXSCH_LVL_TL1 (Results 1 – 5 of 5) sorted by relevance

/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.c39 {NIX_TXSCH_LVL_TL1, 1, 0xFFFF, {{0x0C00, 0x0D98} } },
Dcommon.h142 NIX_TXSCH_LVL_TL1 = 0x4, enumerator
Drvu_nix.c1264 case NIX_TXSCH_LVL_TL1: in nix_reset_tx_shaping()
1776 !is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL1, pcifunc, parent)) in is_txschq_hierarchy_valid()
1795 case NIX_TXSCH_LVL_TL1: in is_txschq_shaping_valid()
1825 pfvf_map = nix_hw->txsch[NIX_TXSCH_LVL_TL1].pfvf_map; in nix_tl1_default_cfg()
1868 if (req->lvl == NIX_TXSCH_LVL_TL1) in rvu_mbox_handler_nix_txschq_cfg()
2220 case NIX_TXSCH_LVL_TL1: in nix_setup_txschq()
Drvu.c64 hw->cap.nix_tx_aggr_lvl = NIX_TXSCH_LVL_TL1; in rvu_setup_hw_capabilities()
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_common.c587 parent = hw->txschq_list[NIX_TXSCH_LVL_TL1][0]; in otx2_txschq_config()
601 } else if (lvl == NIX_TXSCH_LVL_TL1) { in otx2_txschq_config()