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Searched refs:PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5683 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h5622 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h6410 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h6944 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h15474 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
Dgc_9_1_sh_mask.h16783 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
Dgc_9_2_1_sh_mask.h16655 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
Dgc_10_3_0_sh_mask.h21007 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
Dgc_10_1_0_sh_mask.h22853 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro