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Searched refs:PHY_SetBBReg (Results 1 – 11 of 11) sorted by relevance

/drivers/staging/rtl8723bs/hal/
DHalPhyRf_8723B.c89 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); in setIqkMatrix_8723B()
92 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); in setIqkMatrix_8723B()
95 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32); in setIqkMatrix_8723B()
102 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); in setIqkMatrix_8723B()
105 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); in setIqkMatrix_8723B()
108 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, value32); in setIqkMatrix_8723B()
117 …PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); in setIqkMatrix_8723B()
118 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); in setIqkMatrix_8723B()
119 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00); in setIqkMatrix_8723B()
123 …PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); in setIqkMatrix_8723B()
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Dodm_DynamicBBPowerSaving.c65 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ in ODM_RF_Saving()
66 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */ in ODM_RF_Saving()
67 PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */ in ODM_RF_Saving()
68 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ in ODM_RF_Saving()
69 PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */ in ODM_RF_Saving()
70 PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */ in ODM_RF_Saving()
71 PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */ in ODM_RF_Saving()
73 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874); in ODM_RF_Saving()
74 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70); in ODM_RF_Saving()
75 PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); in ODM_RF_Saving()
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Drtl8723b_phycfg.c149 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
153 …PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
157 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEd… in phy_RFSerialRead_8723B()
158 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge… in phy_RFSerialRead_8723B()
257 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
492 PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); in PHY_BBConfig8723B()
537 PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
540 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
543 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); in PHY_SetTxPowerIndex()
546 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); in PHY_SetTxPowerIndex()
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Drtl8723b_rf6052.c111 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in phy_RF6052_Config_ParaFile()
115 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
119 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 825… in phy_RF6052_Config_ParaFile()
122 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
141 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
145 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); in phy_RF6052_Config_ParaFile()
Dodm_DIG.c23 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_… in odm_NHMCounterStatisticsInit()
24 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
25 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /* 0xc0c[7]= 1 max power a… in odm_NHMCounterStatisticsInit()
53 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); in odm_NHMCounterStatisticsReset()
54 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); in odm_NHMCounterStatisticsReset()
152 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
153 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); in odm_SearchPwdBLowerBound()
176 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
177 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); in odm_SearchPwdBLowerBound()
230 PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /* stop counting if EDCCA is asserted */ in odm_AdaptivityInit()
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Dodm_RegConfig8723B.c156 PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); in odm_ConfigBB_AGC_8723B()
220 PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); in odm_ConfigBB_PHY_8723B()
Dodm_NoiseMonitor.c64 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 1); in odm_InbandNoise_Monitor_NSeries()
75 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 0); in odm_InbandNoise_Monitor_NSeries()
Dodm_CfoTracking.c22 PHY_SetBBReg( in odm_SetCrystalCap()
58 PHY_SetBBReg( in odm_SetATCStatus()
Dhal_btcoex.c779 PHY_SetBBReg(padapter, RegAddr, BitMask, Data); in halbtcoutsrc_SetBbReg()
/drivers/staging/rtl8188eu/include/
Dhal8188e_phy_cfg.h161 #define PHY_SetMacReg PHY_SetBBReg
/drivers/staging/rtl8723bs/include/
Dhal_intf.h373 #define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (Bi… macro
377 #define PHY_SetMacReg PHY_SetBBReg