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Searched refs:PLL_CTL0_N (Results 1 – 1 of 1) sorted by relevance

/drivers/net/mdio/
Dmdio-mux-meson-g12a.c24 #define PLL_CTL0_N GENMASK(14, 10) macro
79 n = FIELD_GET(PLL_CTL0_N, val); in g12a_ephy_pll_recalc_rate()