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Searched refs:PLL_MODE (Results 1 – 1 of 1) sorted by relevance

/drivers/clk/qcom/
Dclk-alpha-pll.c15 #define PLL_MODE(p) ((p)->offset + 0x0) macro
169 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
174 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
247 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0); in clk_alpha_pll_configure()
257 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_enable()
266 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val); in clk_alpha_pll_hwfsm_enable()
282 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in clk_alpha_pll_hwfsm_disable()
287 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
298 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), in clk_alpha_pll_hwfsm_disable()
312 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in pll_is_enabled()
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