1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * RDA8810PL serial device driver
4 *
5 * Copyright RDA Microelectronics Company Limited
6 * Copyright (c) 2017 Andreas Färber
7 * Copyright (c) 2018 Manivannan Sadhasivam
8 */
9
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/delay.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21
22 #define RDA_UART_PORT_NUM 3
23 #define RDA_UART_DEV_NAME "ttyRDA"
24
25 #define RDA_UART_CTRL 0x00
26 #define RDA_UART_STATUS 0x04
27 #define RDA_UART_RXTX_BUFFER 0x08
28 #define RDA_UART_IRQ_MASK 0x0c
29 #define RDA_UART_IRQ_CAUSE 0x10
30 #define RDA_UART_IRQ_TRIGGERS 0x14
31 #define RDA_UART_CMD_SET 0x18
32 #define RDA_UART_CMD_CLR 0x1c
33
34 /* UART_CTRL Bits */
35 #define RDA_UART_ENABLE BIT(0)
36 #define RDA_UART_DBITS_8 BIT(1)
37 #define RDA_UART_TX_SBITS_2 BIT(2)
38 #define RDA_UART_PARITY_EN BIT(3)
39 #define RDA_UART_PARITY(x) (((x) & 0x3) << 4)
40 #define RDA_UART_PARITY_ODD RDA_UART_PARITY(0)
41 #define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1)
42 #define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2)
43 #define RDA_UART_PARITY_MARK RDA_UART_PARITY(3)
44 #define RDA_UART_DIV_MODE BIT(20)
45 #define RDA_UART_IRDA_EN BIT(21)
46 #define RDA_UART_DMA_EN BIT(22)
47 #define RDA_UART_FLOW_CNT_EN BIT(23)
48 #define RDA_UART_LOOP_BACK_EN BIT(24)
49 #define RDA_UART_RX_LOCK_ERR BIT(25)
50 #define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28)
51
52 /* UART_STATUS Bits */
53 #define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0)
54 #define RDA_UART_RX_FIFO_MASK (0x7f << 0)
55 #define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8)
56 #define RDA_UART_TX_FIFO_MASK (0x1f << 8)
57 #define RDA_UART_TX_ACTIVE BIT(14)
58 #define RDA_UART_RX_ACTIVE BIT(15)
59 #define RDA_UART_RX_OVERFLOW_ERR BIT(16)
60 #define RDA_UART_TX_OVERFLOW_ERR BIT(17)
61 #define RDA_UART_RX_PARITY_ERR BIT(18)
62 #define RDA_UART_RX_FRAMING_ERR BIT(19)
63 #define RDA_UART_RX_BREAK_INT BIT(20)
64 #define RDA_UART_DCTS BIT(24)
65 #define RDA_UART_CTS BIT(25)
66 #define RDA_UART_DTR BIT(28)
67 #define RDA_UART_CLK_ENABLED BIT(31)
68
69 /* UART_RXTX_BUFFER Bits */
70 #define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0)
71 #define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0)
72
73 /* UART_IRQ_MASK Bits */
74 #define RDA_UART_TX_MODEM_STATUS BIT(0)
75 #define RDA_UART_RX_DATA_AVAILABLE BIT(1)
76 #define RDA_UART_TX_DATA_NEEDED BIT(2)
77 #define RDA_UART_RX_TIMEOUT BIT(3)
78 #define RDA_UART_RX_LINE_ERR BIT(4)
79 #define RDA_UART_TX_DMA_DONE BIT(5)
80 #define RDA_UART_RX_DMA_DONE BIT(6)
81 #define RDA_UART_RX_DMA_TIMEOUT BIT(7)
82 #define RDA_UART_DTR_RISE BIT(8)
83 #define RDA_UART_DTR_FALL BIT(9)
84
85 /* UART_IRQ_CAUSE Bits */
86 #define RDA_UART_TX_MODEM_STATUS_U BIT(16)
87 #define RDA_UART_RX_DATA_AVAILABLE_U BIT(17)
88 #define RDA_UART_TX_DATA_NEEDED_U BIT(18)
89 #define RDA_UART_RX_TIMEOUT_U BIT(19)
90 #define RDA_UART_RX_LINE_ERR_U BIT(20)
91 #define RDA_UART_TX_DMA_DONE_U BIT(21)
92 #define RDA_UART_RX_DMA_DONE_U BIT(22)
93 #define RDA_UART_RX_DMA_TIMEOUT_U BIT(23)
94 #define RDA_UART_DTR_RISE_U BIT(24)
95 #define RDA_UART_DTR_FALL_U BIT(25)
96
97 /* UART_TRIGGERS Bits */
98 #define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0)
99 #define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8)
100 #define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16)
101
102 /* UART_CMD_SET Bits */
103 #define RDA_UART_RI BIT(0)
104 #define RDA_UART_DCD BIT(1)
105 #define RDA_UART_DSR BIT(2)
106 #define RDA_UART_TX_BREAK_CONTROL BIT(3)
107 #define RDA_UART_TX_FINISH_N_WAIT BIT(4)
108 #define RDA_UART_RTS BIT(5)
109 #define RDA_UART_RX_FIFO_RESET BIT(6)
110 #define RDA_UART_TX_FIFO_RESET BIT(7)
111
112 #define RDA_UART_TX_FIFO_SIZE 16
113
114 static struct uart_driver rda_uart_driver;
115
116 struct rda_uart_port {
117 struct uart_port port;
118 struct clk *clk;
119 };
120
121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
122
123 static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM];
124
rda_uart_write(struct uart_port * port,u32 val,unsigned int off)125 static inline void rda_uart_write(struct uart_port *port, u32 val,
126 unsigned int off)
127 {
128 writel(val, port->membase + off);
129 }
130
rda_uart_read(struct uart_port * port,unsigned int off)131 static inline u32 rda_uart_read(struct uart_port *port, unsigned int off)
132 {
133 return readl(port->membase + off);
134 }
135
rda_uart_tx_empty(struct uart_port * port)136 static unsigned int rda_uart_tx_empty(struct uart_port *port)
137 {
138 unsigned long flags;
139 unsigned int ret;
140 u32 val;
141
142 spin_lock_irqsave(&port->lock, flags);
143
144 val = rda_uart_read(port, RDA_UART_STATUS);
145 ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;
146
147 spin_unlock_irqrestore(&port->lock, flags);
148
149 return ret;
150 }
151
rda_uart_get_mctrl(struct uart_port * port)152 static unsigned int rda_uart_get_mctrl(struct uart_port *port)
153 {
154 unsigned int mctrl = 0;
155 u32 cmd_set, status;
156
157 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
158 status = rda_uart_read(port, RDA_UART_STATUS);
159 if (cmd_set & RDA_UART_RTS)
160 mctrl |= TIOCM_RTS;
161 if (!(status & RDA_UART_CTS))
162 mctrl |= TIOCM_CTS;
163
164 return mctrl;
165 }
166
rda_uart_set_mctrl(struct uart_port * port,unsigned int mctrl)167 static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
168 {
169 u32 val;
170
171 if (mctrl & TIOCM_RTS) {
172 val = rda_uart_read(port, RDA_UART_CMD_SET);
173 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET);
174 } else {
175 /* Clear RTS to stop to receive. */
176 val = rda_uart_read(port, RDA_UART_CMD_CLR);
177 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR);
178 }
179
180 val = rda_uart_read(port, RDA_UART_CTRL);
181
182 if (mctrl & TIOCM_LOOP)
183 val |= RDA_UART_LOOP_BACK_EN;
184 else
185 val &= ~RDA_UART_LOOP_BACK_EN;
186
187 rda_uart_write(port, val, RDA_UART_CTRL);
188 }
189
rda_uart_stop_tx(struct uart_port * port)190 static void rda_uart_stop_tx(struct uart_port *port)
191 {
192 u32 val;
193
194 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
195 val &= ~RDA_UART_TX_DATA_NEEDED;
196 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
197
198 val = rda_uart_read(port, RDA_UART_CMD_SET);
199 val |= RDA_UART_TX_FIFO_RESET;
200 rda_uart_write(port, val, RDA_UART_CMD_SET);
201 }
202
rda_uart_stop_rx(struct uart_port * port)203 static void rda_uart_stop_rx(struct uart_port *port)
204 {
205 u32 val;
206
207 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
208 val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
209 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
210
211 /* Read Rx buffer before reset to avoid Rx timeout interrupt */
212 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
213
214 val = rda_uart_read(port, RDA_UART_CMD_SET);
215 val |= RDA_UART_RX_FIFO_RESET;
216 rda_uart_write(port, val, RDA_UART_CMD_SET);
217 }
218
rda_uart_start_tx(struct uart_port * port)219 static void rda_uart_start_tx(struct uart_port *port)
220 {
221 u32 val;
222
223 if (uart_tx_stopped(port)) {
224 rda_uart_stop_tx(port);
225 return;
226 }
227
228 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
229 val |= RDA_UART_TX_DATA_NEEDED;
230 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
231 }
232
rda_uart_change_baudrate(struct rda_uart_port * rda_port,unsigned long baud)233 static void rda_uart_change_baudrate(struct rda_uart_port *rda_port,
234 unsigned long baud)
235 {
236 clk_set_rate(rda_port->clk, baud * 8);
237 }
238
rda_uart_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)239 static void rda_uart_set_termios(struct uart_port *port,
240 struct ktermios *termios,
241 struct ktermios *old)
242 {
243 struct rda_uart_port *rda_port = to_rda_uart_port(port);
244 unsigned long flags;
245 unsigned int ctrl, cmd_set, cmd_clr, triggers;
246 unsigned int baud;
247 u32 irq_mask;
248
249 spin_lock_irqsave(&port->lock, flags);
250
251 baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
252 rda_uart_change_baudrate(rda_port, baud);
253
254 ctrl = rda_uart_read(port, RDA_UART_CTRL);
255 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
256 cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR);
257
258 switch (termios->c_cflag & CSIZE) {
259 case CS5:
260 case CS6:
261 dev_warn(port->dev, "bit size not supported, using 7 bits\n");
262 fallthrough;
263 case CS7:
264 ctrl &= ~RDA_UART_DBITS_8;
265 termios->c_cflag &= ~CSIZE;
266 termios->c_cflag |= CS7;
267 break;
268 default:
269 ctrl |= RDA_UART_DBITS_8;
270 break;
271 }
272
273 /* stop bits */
274 if (termios->c_cflag & CSTOPB)
275 ctrl |= RDA_UART_TX_SBITS_2;
276 else
277 ctrl &= ~RDA_UART_TX_SBITS_2;
278
279 /* parity check */
280 if (termios->c_cflag & PARENB) {
281 ctrl |= RDA_UART_PARITY_EN;
282
283 /* Mark or Space parity */
284 if (termios->c_cflag & CMSPAR) {
285 if (termios->c_cflag & PARODD)
286 ctrl |= RDA_UART_PARITY_MARK;
287 else
288 ctrl |= RDA_UART_PARITY_SPACE;
289 } else if (termios->c_cflag & PARODD) {
290 ctrl |= RDA_UART_PARITY_ODD;
291 } else {
292 ctrl |= RDA_UART_PARITY_EVEN;
293 }
294 } else {
295 ctrl &= ~RDA_UART_PARITY_EN;
296 }
297
298 /* Hardware handshake (RTS/CTS) */
299 if (termios->c_cflag & CRTSCTS) {
300 ctrl |= RDA_UART_FLOW_CNT_EN;
301 cmd_set |= RDA_UART_RTS;
302 } else {
303 ctrl &= ~RDA_UART_FLOW_CNT_EN;
304 cmd_clr |= RDA_UART_RTS;
305 }
306
307 ctrl |= RDA_UART_ENABLE;
308 ctrl &= ~RDA_UART_DMA_EN;
309
310 triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
311 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
312 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
313
314 rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS);
315 rda_uart_write(port, ctrl, RDA_UART_CTRL);
316 rda_uart_write(port, cmd_set, RDA_UART_CMD_SET);
317 rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR);
318
319 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
320
321 /* Don't rewrite B0 */
322 if (tty_termios_baud_rate(termios))
323 tty_termios_encode_baud_rate(termios, baud, baud);
324
325 /* update the per-port timeout */
326 uart_update_timeout(port, termios->c_cflag, baud);
327
328 spin_unlock_irqrestore(&port->lock, flags);
329 }
330
rda_uart_send_chars(struct uart_port * port)331 static void rda_uart_send_chars(struct uart_port *port)
332 {
333 struct circ_buf *xmit = &port->state->xmit;
334 unsigned int ch;
335 u32 val;
336
337 if (uart_tx_stopped(port))
338 return;
339
340 if (port->x_char) {
341 while (!(rda_uart_read(port, RDA_UART_STATUS) &
342 RDA_UART_TX_FIFO_MASK))
343 cpu_relax();
344
345 rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER);
346 port->icount.tx++;
347 port->x_char = 0;
348 }
349
350 while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) {
351 if (uart_circ_empty(xmit))
352 break;
353
354 ch = xmit->buf[xmit->tail];
355 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
356 xmit->tail = (xmit->tail + 1) & (SERIAL_XMIT_SIZE - 1);
357 port->icount.tx++;
358 }
359
360 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
361 uart_write_wakeup(port);
362
363 if (!uart_circ_empty(xmit)) {
364 /* Re-enable Tx FIFO interrupt */
365 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
366 val |= RDA_UART_TX_DATA_NEEDED;
367 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
368 }
369 }
370
rda_uart_receive_chars(struct uart_port * port)371 static void rda_uart_receive_chars(struct uart_port *port)
372 {
373 u32 status, val;
374
375 status = rda_uart_read(port, RDA_UART_STATUS);
376 while ((status & RDA_UART_RX_FIFO_MASK)) {
377 char flag = TTY_NORMAL;
378
379 if (status & RDA_UART_RX_PARITY_ERR) {
380 port->icount.parity++;
381 flag = TTY_PARITY;
382 }
383
384 if (status & RDA_UART_RX_FRAMING_ERR) {
385 port->icount.frame++;
386 flag = TTY_FRAME;
387 }
388
389 if (status & RDA_UART_RX_OVERFLOW_ERR) {
390 port->icount.overrun++;
391 flag = TTY_OVERRUN;
392 }
393
394 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
395 val &= 0xff;
396
397 port->icount.rx++;
398 tty_insert_flip_char(&port->state->port, val, flag);
399
400 status = rda_uart_read(port, RDA_UART_STATUS);
401 }
402
403 spin_unlock(&port->lock);
404 tty_flip_buffer_push(&port->state->port);
405 spin_lock(&port->lock);
406 }
407
rda_interrupt(int irq,void * dev_id)408 static irqreturn_t rda_interrupt(int irq, void *dev_id)
409 {
410 struct uart_port *port = dev_id;
411 unsigned long flags;
412 u32 val, irq_mask;
413
414 spin_lock_irqsave(&port->lock, flags);
415
416 /* Clear IRQ cause */
417 val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);
418 rda_uart_write(port, val, RDA_UART_IRQ_CAUSE);
419
420 if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT))
421 rda_uart_receive_chars(port);
422
423 if (val & (RDA_UART_TX_DATA_NEEDED)) {
424 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
425 irq_mask &= ~RDA_UART_TX_DATA_NEEDED;
426 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
427
428 rda_uart_send_chars(port);
429 }
430
431 spin_unlock_irqrestore(&port->lock, flags);
432
433 return IRQ_HANDLED;
434 }
435
rda_uart_startup(struct uart_port * port)436 static int rda_uart_startup(struct uart_port *port)
437 {
438 unsigned long flags;
439 int ret;
440 u32 val;
441
442 spin_lock_irqsave(&port->lock, flags);
443 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
444 spin_unlock_irqrestore(&port->lock, flags);
445
446 ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
447 "rda-uart", port);
448 if (ret)
449 return ret;
450
451 spin_lock_irqsave(&port->lock, flags);
452
453 val = rda_uart_read(port, RDA_UART_CTRL);
454 val |= RDA_UART_ENABLE;
455 rda_uart_write(port, val, RDA_UART_CTRL);
456
457 /* enable rx interrupt */
458 val = rda_uart_read(port, RDA_UART_IRQ_MASK);
459 val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
460 rda_uart_write(port, val, RDA_UART_IRQ_MASK);
461
462 spin_unlock_irqrestore(&port->lock, flags);
463
464 return 0;
465 }
466
rda_uart_shutdown(struct uart_port * port)467 static void rda_uart_shutdown(struct uart_port *port)
468 {
469 unsigned long flags;
470 u32 val;
471
472 spin_lock_irqsave(&port->lock, flags);
473
474 rda_uart_stop_tx(port);
475 rda_uart_stop_rx(port);
476
477 val = rda_uart_read(port, RDA_UART_CTRL);
478 val &= ~RDA_UART_ENABLE;
479 rda_uart_write(port, val, RDA_UART_CTRL);
480
481 spin_unlock_irqrestore(&port->lock, flags);
482 }
483
rda_uart_type(struct uart_port * port)484 static const char *rda_uart_type(struct uart_port *port)
485 {
486 return (port->type == PORT_RDA) ? "rda-uart" : NULL;
487 }
488
rda_uart_request_port(struct uart_port * port)489 static int rda_uart_request_port(struct uart_port *port)
490 {
491 struct platform_device *pdev = to_platform_device(port->dev);
492 struct resource *res;
493
494 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
495 if (!res)
496 return -ENXIO;
497
498 if (!devm_request_mem_region(port->dev, port->mapbase,
499 resource_size(res), dev_name(port->dev)))
500 return -EBUSY;
501
502 if (port->flags & UPF_IOREMAP) {
503 port->membase = devm_ioremap(port->dev, port->mapbase,
504 resource_size(res));
505 if (!port->membase)
506 return -EBUSY;
507 }
508
509 return 0;
510 }
511
rda_uart_config_port(struct uart_port * port,int flags)512 static void rda_uart_config_port(struct uart_port *port, int flags)
513 {
514 unsigned long irq_flags;
515
516 if (flags & UART_CONFIG_TYPE) {
517 port->type = PORT_RDA;
518 rda_uart_request_port(port);
519 }
520
521 spin_lock_irqsave(&port->lock, irq_flags);
522
523 /* Clear mask, so no surprise interrupts. */
524 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
525
526 /* Clear status register */
527 rda_uart_write(port, 0, RDA_UART_STATUS);
528
529 spin_unlock_irqrestore(&port->lock, irq_flags);
530 }
531
rda_uart_release_port(struct uart_port * port)532 static void rda_uart_release_port(struct uart_port *port)
533 {
534 struct platform_device *pdev = to_platform_device(port->dev);
535 struct resource *res;
536
537 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
538 if (!res)
539 return;
540
541 if (port->flags & UPF_IOREMAP) {
542 devm_release_mem_region(port->dev, port->mapbase,
543 resource_size(res));
544 devm_iounmap(port->dev, port->membase);
545 port->membase = NULL;
546 }
547 }
548
rda_uart_verify_port(struct uart_port * port,struct serial_struct * ser)549 static int rda_uart_verify_port(struct uart_port *port,
550 struct serial_struct *ser)
551 {
552 if (port->type != PORT_RDA)
553 return -EINVAL;
554
555 if (port->irq != ser->irq)
556 return -EINVAL;
557
558 return 0;
559 }
560
561 static const struct uart_ops rda_uart_ops = {
562 .tx_empty = rda_uart_tx_empty,
563 .get_mctrl = rda_uart_get_mctrl,
564 .set_mctrl = rda_uart_set_mctrl,
565 .start_tx = rda_uart_start_tx,
566 .stop_tx = rda_uart_stop_tx,
567 .stop_rx = rda_uart_stop_rx,
568 .startup = rda_uart_startup,
569 .shutdown = rda_uart_shutdown,
570 .set_termios = rda_uart_set_termios,
571 .type = rda_uart_type,
572 .request_port = rda_uart_request_port,
573 .release_port = rda_uart_release_port,
574 .config_port = rda_uart_config_port,
575 .verify_port = rda_uart_verify_port,
576 };
577
578 #ifdef CONFIG_SERIAL_RDA_CONSOLE
579
rda_console_putchar(struct uart_port * port,int ch)580 static void rda_console_putchar(struct uart_port *port, int ch)
581 {
582 if (!port->membase)
583 return;
584
585 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
586 cpu_relax();
587
588 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
589 }
590
rda_uart_port_write(struct uart_port * port,const char * s,u_int count)591 static void rda_uart_port_write(struct uart_port *port, const char *s,
592 u_int count)
593 {
594 u32 old_irq_mask;
595 unsigned long flags;
596 int locked;
597
598 local_irq_save(flags);
599
600 if (port->sysrq) {
601 locked = 0;
602 } else if (oops_in_progress) {
603 locked = spin_trylock(&port->lock);
604 } else {
605 spin_lock(&port->lock);
606 locked = 1;
607 }
608
609 old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
610 rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
611
612 uart_console_write(port, s, count, rda_console_putchar);
613
614 /* wait until all contents have been sent out */
615 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
616 cpu_relax();
617
618 rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);
619
620 if (locked)
621 spin_unlock(&port->lock);
622
623 local_irq_restore(flags);
624 }
625
rda_uart_console_write(struct console * co,const char * s,u_int count)626 static void rda_uart_console_write(struct console *co, const char *s,
627 u_int count)
628 {
629 struct rda_uart_port *rda_port;
630
631 rda_port = rda_uart_ports[co->index];
632 if (!rda_port)
633 return;
634
635 rda_uart_port_write(&rda_port->port, s, count);
636 }
637
rda_uart_console_setup(struct console * co,char * options)638 static int rda_uart_console_setup(struct console *co, char *options)
639 {
640 struct rda_uart_port *rda_port;
641 int baud = 921600;
642 int bits = 8;
643 int parity = 'n';
644 int flow = 'n';
645
646 if (co->index < 0 || co->index >= RDA_UART_PORT_NUM)
647 return -EINVAL;
648
649 rda_port = rda_uart_ports[co->index];
650 if (!rda_port || !rda_port->port.membase)
651 return -ENODEV;
652
653 if (options)
654 uart_parse_options(options, &baud, &parity, &bits, &flow);
655
656 return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
657 }
658
659 static struct console rda_uart_console = {
660 .name = RDA_UART_DEV_NAME,
661 .write = rda_uart_console_write,
662 .device = uart_console_device,
663 .setup = rda_uart_console_setup,
664 .flags = CON_PRINTBUFFER,
665 .index = -1,
666 .data = &rda_uart_driver,
667 };
668
rda_uart_console_init(void)669 static int __init rda_uart_console_init(void)
670 {
671 register_console(&rda_uart_console);
672
673 return 0;
674 }
675 console_initcall(rda_uart_console_init);
676
rda_uart_early_console_write(struct console * co,const char * s,u_int count)677 static void rda_uart_early_console_write(struct console *co,
678 const char *s,
679 u_int count)
680 {
681 struct earlycon_device *dev = co->data;
682
683 rda_uart_port_write(&dev->port, s, count);
684 }
685
686 static int __init
rda_uart_early_console_setup(struct earlycon_device * device,const char * opt)687 rda_uart_early_console_setup(struct earlycon_device *device, const char *opt)
688 {
689 if (!device->port.membase)
690 return -ENODEV;
691
692 device->con->write = rda_uart_early_console_write;
693
694 return 0;
695 }
696
697 OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart",
698 rda_uart_early_console_setup);
699
700 #define RDA_UART_CONSOLE (&rda_uart_console)
701 #else
702 #define RDA_UART_CONSOLE NULL
703 #endif /* CONFIG_SERIAL_RDA_CONSOLE */
704
705 static struct uart_driver rda_uart_driver = {
706 .owner = THIS_MODULE,
707 .driver_name = "rda-uart",
708 .dev_name = RDA_UART_DEV_NAME,
709 .nr = RDA_UART_PORT_NUM,
710 .cons = RDA_UART_CONSOLE,
711 };
712
713 static const struct of_device_id rda_uart_dt_matches[] = {
714 { .compatible = "rda,8810pl-uart" },
715 { }
716 };
717 MODULE_DEVICE_TABLE(of, rda_uart_dt_matches);
718
rda_uart_probe(struct platform_device * pdev)719 static int rda_uart_probe(struct platform_device *pdev)
720 {
721 struct resource *res_mem;
722 struct rda_uart_port *rda_port;
723 int ret, irq;
724
725 if (pdev->dev.of_node)
726 pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
727
728 if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) {
729 dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
730 return -EINVAL;
731 }
732
733 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
734 if (!res_mem) {
735 dev_err(&pdev->dev, "could not get mem\n");
736 return -ENODEV;
737 }
738
739 irq = platform_get_irq(pdev, 0);
740 if (irq < 0)
741 return irq;
742
743 if (rda_uart_ports[pdev->id]) {
744 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
745 return -EBUSY;
746 }
747
748 rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL);
749 if (!rda_port)
750 return -ENOMEM;
751
752 rda_port->clk = devm_clk_get(&pdev->dev, NULL);
753 if (IS_ERR(rda_port->clk)) {
754 dev_err(&pdev->dev, "could not get clk\n");
755 return PTR_ERR(rda_port->clk);
756 }
757
758 rda_port->port.dev = &pdev->dev;
759 rda_port->port.regshift = 0;
760 rda_port->port.line = pdev->id;
761 rda_port->port.type = PORT_RDA;
762 rda_port->port.iotype = UPIO_MEM;
763 rda_port->port.mapbase = res_mem->start;
764 rda_port->port.irq = irq;
765 rda_port->port.uartclk = clk_get_rate(rda_port->clk);
766 if (rda_port->port.uartclk == 0) {
767 dev_err(&pdev->dev, "clock rate is zero\n");
768 return -EINVAL;
769 }
770 rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
771 UPF_LOW_LATENCY;
772 rda_port->port.x_char = 0;
773 rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE;
774 rda_port->port.ops = &rda_uart_ops;
775
776 rda_uart_ports[pdev->id] = rda_port;
777 platform_set_drvdata(pdev, rda_port);
778
779 ret = uart_add_one_port(&rda_uart_driver, &rda_port->port);
780 if (ret)
781 rda_uart_ports[pdev->id] = NULL;
782
783 return ret;
784 }
785
rda_uart_remove(struct platform_device * pdev)786 static int rda_uart_remove(struct platform_device *pdev)
787 {
788 struct rda_uart_port *rda_port = platform_get_drvdata(pdev);
789
790 uart_remove_one_port(&rda_uart_driver, &rda_port->port);
791 rda_uart_ports[pdev->id] = NULL;
792
793 return 0;
794 }
795
796 static struct platform_driver rda_uart_platform_driver = {
797 .probe = rda_uart_probe,
798 .remove = rda_uart_remove,
799 .driver = {
800 .name = "rda-uart",
801 .of_match_table = rda_uart_dt_matches,
802 },
803 };
804
rda_uart_init(void)805 static int __init rda_uart_init(void)
806 {
807 int ret;
808
809 ret = uart_register_driver(&rda_uart_driver);
810 if (ret)
811 return ret;
812
813 ret = platform_driver_register(&rda_uart_platform_driver);
814 if (ret)
815 uart_unregister_driver(&rda_uart_driver);
816
817 return ret;
818 }
819
rda_uart_exit(void)820 static void __exit rda_uart_exit(void)
821 {
822 platform_driver_unregister(&rda_uart_platform_driver);
823 uart_unregister_driver(&rda_uart_driver);
824 }
825
826 module_init(rda_uart_init);
827 module_exit(rda_uart_exit);
828
829 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
830 MODULE_DESCRIPTION("RDA8810PL serial device driver");
831 MODULE_LICENSE("GPL");
832