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Searched refs:REG_DSI_10nm_PHY_CMN_TIMING_CTRL_3 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_10nm.c145 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_TIMING_CTRL_3, in dsi_10nm_phy_enable()
/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h1765 #define REG_DSI_10nm_PHY_CMN_TIMING_CTRL_3 0x000000b8 macro