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Searched refs:REG_DSI_10nm_PHY_PLL_CALIBRATION_SETTINGS (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_10nm.c278 pll_write(base + REG_DSI_10nm_PHY_PLL_CALIBRATION_SETTINGS, 0x40); in dsi_pll_config_hzindep_reg()
/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h1829 #define REG_DSI_10nm_PHY_PLL_CALIBRATION_SETTINGS 0x00000030 macro