Searched refs:REG_DSI_7nm_PHY_CMN_CTRL_0 (Results 1 – 3 of 3) sorted by relevance
127 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, data); in dsi_7nm_phy_enable()161 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, 0x7f); in dsi_7nm_phy_enable()
386 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()389 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0, data & ~BIT(5)); in dsi_pll_disable_pll_bias()395 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()397 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0, data | BIT(5)); in dsi_pll_enable_pll_bias()
1907 #define REG_DSI_7nm_PHY_CMN_CTRL_0 0x00000024 macro