Searched refs:REG_DSI_7nm_PHY_CMN_TIMING_CTRL_7 (Results 1 – 2 of 2) sorted by relevance
183 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_7, timing->hs_trail); in dsi_7nm_phy_enable()
1947 #define REG_DSI_7nm_PHY_CMN_TIMING_CTRL_7 0x000000d0 macro