Searched refs:REG_DSI_7nm_PHY_PLL_ANALOG_CONTROLS_FIVE (Results 1 – 2 of 2) sorted by relevance
288 pll_write(base + REG_DSI_7nm_PHY_PLL_ANALOG_CONTROLS_FIVE, 0x01); in dsi_pll_config_hzindep_reg()
2019 #define REG_DSI_7nm_PHY_PLL_ANALOG_CONTROLS_FIVE 0x00000018 macro