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Searched refs:REG_UPDATE_7 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_opp.c66 REG_UPDATE_7(FMT_BIT_DEPTH_CONTROL, in opp1_set_spatial_dither()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c57 REG_UPDATE_7(MPCC_CONTROL[mpcc_id], in mpc2_update_blending()
/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h269 #define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ macro