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Searched refs:RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h8819 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK 0x80000000 macro
Dgfx_8_1_sh_mask.h9369 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK 0x80000000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23130 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK … macro
Dgc_9_1_sh_mask.h24421 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK … macro
Dgc_9_2_1_sh_mask.h24482 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK … macro
Dgc_10_3_0_sh_mask.h32510 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK … macro
Dgc_10_1_0_sh_mask.h33468 #define RLC_CGCG_CGLS_CTRL__SIM_SILICON_EN_MASK … macro