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Searched refs:RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h8705 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK 0x10 macro
Dgfx_8_1_sh_mask.h9255 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK 0x10 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23019 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK … macro
Dgc_9_1_sh_mask.h24310 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK … macro
Dgc_9_2_1_sh_mask.h24361 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK … macro
Dgc_10_3_0_sh_mask.h33919 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK … macro
Dgc_10_1_0_sh_mask.h34640 #define RLC_GPM_STAT__GFX_PIPELINE_POWER_STATUS_MASK … macro