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Searched refs:RLC_MAX_PG_CU__SPARE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7166 #define RLC_MAX_PG_CU__SPARE_MASK 0xffffff00L macro
Dgfx_7_2_sh_mask.h7953 #define RLC_MAX_PG_CU__SPARE_MASK 0xffffff00 macro
Dgfx_8_0_sh_mask.h8871 #define RLC_MAX_PG_CU__SPARE_MASK 0xffffff00 macro
Dgfx_8_1_sh_mask.h9421 #define RLC_MAX_PG_CU__SPARE_MASK 0xffffff00 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23193 #define RLC_MAX_PG_CU__SPARE_MASK macro
Dgc_9_1_sh_mask.h24484 #define RLC_MAX_PG_CU__SPARE_MASK macro
Dgc_9_2_1_sh_mask.h24545 #define RLC_MAX_PG_CU__SPARE_MASK macro