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Searched refs:RLC_PG_CNTL__CP_PG_DISABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h8755 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK 0x8000 macro
Dgfx_8_1_sh_mask.h9307 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK 0x8000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23069 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK … macro
Dgc_9_1_sh_mask.h24360 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK … macro
Dgc_9_2_1_sh_mask.h24413 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK … macro
Dgc_10_3_0_sh_mask.h32457 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK … macro
Dgc_10_1_0_sh_mask.h33399 #define RLC_PG_CNTL__CP_PG_DISABLE_MASK … macro