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Searched refs:RSMU_BASE (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Darct_reg_init.c55 adev->reg_offset[RSMU_HWIP][i] = (uint32_t *)(&(RSMU_BASE.instance[i])); in arct_reg_base_init()
Dvega20_reg_init.c53 adev->reg_offset[RSMU_HWIP][i] = (uint32_t *)(&(RSMU_BASE.instance[i])); in vega20_reg_base_init()
/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h109 static const struct IP_BASE RSMU_BASE = { { { { 0x00012000, 0, 0, 0, 0, 0 } }, variable
Dvega20_ip_offset.h160 static const struct IP_BASE RSMU_BASE ={ { { { 0x00012000, 0, 0, 0, 0, 0 } }, variable
Dvega10_ip_offset.h153 static const struct IP_BASE RSMU_BASE = { { { { 0x00012000, 0, 0, 0, 0 } }, variable
Darct_ip_offset.h235 static const struct IP_BASE RSMU_BASE ={ { { { 0x00012000, 0, 0, 0, 0, 0 } }, variable