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Searched refs:SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_0.c74 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK 0x000000F8L macro
1350 data &= ~SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK; in sdma_v4_1_init_power_gating()
1351 data |= (mmSDMA0_POWER_CNTL_DEFAULT & SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK); in sdma_v4_1_init_power_gating()
/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h366 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK … macro
Dsdma0_4_2_2_sh_mask.h373 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK … macro
Dsdma0_4_2_sh_mask.h367 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK … macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h60 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK … macro
Dgc_10_1_0_sh_mask.h57 #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK … macro