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Searched refs:SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h1167 #define SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT 0x0 macro
Dsdma1_4_2_sh_mask.h1171 #define SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro
Dsdma1_4_2_2_sh_mask.h1179 #define SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h3872 #define SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro
Dgc_10_1_0_sh_mask.h3723 #define SDMA1_GFX_STATUS__WPTR_UPDATE_FAIL_COUNT__SHIFT … macro