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Searched refs:SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h360 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa macro
Dsdma1_4_2_sh_mask.h358 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT macro
Dsdma1_4_2_2_sh_mask.h362 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT macro
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_3_0_1_sh_mask.h2018 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa macro
Doss_3_0_sh_mask.h2322 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h2816 #define SDMA1_POWER_CNTL__MEM_POWER_DS_EN__SHIFT macro