Home
last modified time | relevance | path

Searched refs:SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h1499 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
Dsdma1_4_2_sh_mask.h1507 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT macro
Dsdma1_4_2_2_sh_mask.h1515 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT macro
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_sh_mask.h1886 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
Doss_2_0_sh_mask.h1686 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
Doss_3_0_1_sh_mask.h2834 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
Doss_3_0_sh_mask.h2948 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT 0x2 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h4232 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT macro
Dgc_10_1_0_sh_mask.h4063 #define SDMA1_RLC0_IB_RPTR__OFFSET__SHIFT macro