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Searched refs:SDMA1_RLC0_RB_BASE__ADDR_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h1456 #define SDMA1_RLC0_RB_BASE__ADDR_MASK 0xFFFFFFFFL macro
Dsdma1_4_2_sh_mask.h1462 #define SDMA1_RLC0_RB_BASE__ADDR_MASK … macro
Dsdma1_4_2_2_sh_mask.h1470 #define SDMA1_RLC0_RB_BASE__ADDR_MASK … macro
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_sh_mask.h1853 #define SDMA1_RLC0_RB_BASE__ADDR_MASK 0xffffffff macro
Doss_2_0_sh_mask.h1653 #define SDMA1_RLC0_RB_BASE__ADDR_MASK 0xffffffff macro
Doss_3_0_1_sh_mask.h2799 #define SDMA1_RLC0_RB_BASE__ADDR_MASK 0xffffffff macro
Doss_3_0_sh_mask.h2913 #define SDMA1_RLC0_RB_BASE__ADDR_MASK 0xffffffff macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h4189 #define SDMA1_RLC0_RB_BASE__ADDR_MASK … macro
Dgc_10_1_0_sh_mask.h4020 #define SDMA1_RLC0_RB_BASE__ADDR_MASK … macro