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Searched refs:SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h541 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT 0x3 macro
Dsdma1_4_2_sh_mask.h539 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT … macro
Dsdma1_4_2_2_sh_mask.h543 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT … macro
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_sh_mask.h1652 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT 0x3 macro
Doss_2_0_sh_mask.h1488 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT 0x3 macro
Doss_3_0_1_sh_mask.h2170 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT 0x3 macro
Doss_3_0_sh_mask.h2474 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT 0x3 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h3128 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h3021 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE__SHIFT … macro