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Searched refs:SH_MEM_CONFIG__ADDRESS_MODE_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dkfd_device_queue_manager_vi.c116 SH_MEM_CONFIG__ADDRESS_MODE_MASK) | in set_cache_memory_policy_vi()
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h14547 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK 0x3 macro
Dgfx_8_1_sh_mask.h14945 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK 0x3 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h2235 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK … macro
Dgc_9_1_sh_mask.h2083 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK … macro
Dgc_9_2_1_sh_mask.h2106 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK … macro
Dgc_10_3_0_sh_mask.h8131 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK … macro
Dgc_10_1_0_sh_mask.h7815 #define SH_MEM_CONFIG__ADDRESS_MODE_MASK … macro