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Searched refs:SMU_INTERRUPT_CONTROL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.h46 SR(SMU_INTERRUPT_CONTROL), \
81 SR(SMU_INTERRUPT_CONTROL), \
123 DMCU_SF(SMU_INTERRUPT_CONTROL, DC_SMU_INT_ENABLE, mask_sh)
160 DMCU_SF(SMU_INTERRUPT_CONTROL, DC_SMU_INT_ENABLE, mask_sh)
217 uint32_t SMU_INTERRUPT_CONTROL; member
Ddce_dmcu.c664 REG_UPDATE(SMU_INTERRUPT_CONTROL, DC_SMU_INT_ENABLE, 1); in dcn10_dmcu_setup_psr()