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Searched refs:SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h71 #define SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK (2 << 0) macro
Dsor.c555 value |= SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK; in tegra_clk_sor_pad_set_parent()
579 case SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK: in tegra_clk_sor_pad_get_parent()
2799 value |= SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_DPCLK; in tegra_sor_dp_enable()