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Searched refs:SOR_DP_PADCTL_SPAREPLL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h346 #define SOR_DP_PADCTL_SPAREPLL_MASK (0xff << 24) macro
Dsor.c2542 value &= ~SOR_DP_PADCTL_SPAREPLL_MASK; in tegra_sor_hdmi_enable()