Searched refs:SOR_LANE_SEQ_CTL_SEQUENCE_UP (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/tegra/ | ||
| D | sor.h | 159 #define SOR_LANE_SEQ_CTL_SEQUENCE_UP (0 << 20) macro |
| D | sor.c | 706 value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_UP | in tegra_sor_power_down_lanes() |