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Searched refs:SOR_PLL3_AVDD14_LEVEL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h133 #define SOR_PLL3_AVDD14_LEVEL_MASK (0xf << 4) macro
Dsor.c2516 value &= ~SOR_PLL3_AVDD14_LEVEL_MASK; in tegra_sor_hdmi_enable()