Searched refs:SOR_PLL3_BG_TEMP_COEF_MASK (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/tegra/ | ||
| D | sor.h | 125 #define SOR_PLL3_BG_TEMP_COEF_MASK (0xf << 28) macro |
| D | sor.c | 2513 value &= ~SOR_PLL3_BG_TEMP_COEF_MASK; in tegra_sor_hdmi_enable() |