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Searched refs:SOR_PWM_CTL_DUTY_CYCLE_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h197 #define SOR_PWM_CTL_DUTY_CYCLE_MASK 0xffffff macro
Dsor.c977 value &= ~SOR_PWM_CTL_DUTY_CYCLE_MASK; in tegra_sor_setup_pwm()