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Searched refs:SOR_SEQ_CTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h150 #define SOR_SEQ_CTL 0x20 macro
Dsor.c1564 DEBUGFS_REG32(SOR_SEQ_CTL),
2371 tegra_sor_writel(sor, value, SOR_SEQ_CTL); in tegra_sor_hdmi_enable()