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Searched refs:SOR_SEQ_CTL_PU_PC (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h154 #define SOR_SEQ_CTL_PU_PC(x) (((x) & 0xf) << 0) macro
Dsor.c2369 value = SOR_SEQ_CTL_PU_PC(0) | SOR_SEQ_CTL_PU_PC_ALT(0) | in tegra_sor_hdmi_enable()