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Searched refs:SPI_CDBG_SYS_CS0__PIPE0__SHIFT (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8820 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h10422 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h10820 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT 0x0 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12259 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro
Dgc_9_2_1_sh_mask.h13439 #define SPI_CDBG_SYS_CS0__PIPE0__SHIFT macro