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Searched refs:SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8909 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK 0x78000 macro
Dgfx_8_0_sh_mask.h10529 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK 0x78000 macro
Dgfx_8_1_sh_mask.h10927 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK 0x78000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12411 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK … macro
Dgc_9_1_sh_mask.h13715 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK … macro
Dgc_9_2_1_sh_mask.h13580 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK … macro
Dgc_10_3_0_sh_mask.h18011 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK … macro
Dgc_10_1_0_sh_mask.h19662 #define SPI_RESOURCE_RESERVE_CU_0__BARRIERS_MASK … macro