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Searched refs:SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8972 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h10592 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h10990 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT 0x0 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12479 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT macro
Dgc_9_1_sh_mask.h13783 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT macro
Dgc_9_2_1_sh_mask.h13648 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT macro
Dgc_10_3_0_sh_mask.h18079 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT macro
Dgc_10_1_0_sh_mask.h19730 #define SPI_RESOURCE_RESERVE_CU_7__VGPR__SHIFT macro